74HC4040D

74HC4040DThe 74HC4040; 74HCT4040 is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input(MR) and twelve parallel outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears allcounter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. Inputsinclude clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.